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c-AFM lithography

The 3 unit cell LAO/STO is insulating, while the 4 uc LAO/STO is conducting. This critical thickness dependence can be understood through the polar catastrophe model. Due to polar discontinuity, some voltage potential builds up inside LAO and is only large enough to drive interface reconstruction to compensate the builtin potential at 4 uc. Our idea was, for a 3 uc LAO/STO sample, it might be possible to use a voltage biased AFM tip to induce metal insulator transition. It turned out this was a brilliant idea. A positively biased tip can charge the surface through water molecules and cause the written paths to be conducting at the interface. In the other hand, a negatively biased tip can restore the insulating state, effectively erasing the nanostructures[1].  By combinng the writing and erasing procedures, nanowires[2], junctions,[2] transistors[3], diodes[4], photo detector[5]s,  THz  generator/detectors[6] and single electron transistors[7] have been demonstrated.

 

[1] F. Bi et al., Appl Phys Lett 97, 173110 (2010).

[2] C. Cen et al., Nat Mater 7, 298 (2008).

[3] C. Cen et al., Science 323, 1026 (2009).

[4] D. F. Bogorin et al., Appl Phys Lett 97, 013102 (2010).

[5] P. Irvin et al., Nature Photonics 4, 849 (2010).

[6] Y. J. Ma et al., Nano Lett 13, 2884 (2013).

[7] G. L. Cheng et al., Nature nanotechnology 6, 343 (2011).