Faculty
Jun Yang, Youtao Zhang
PhD Students
Yi Xu, Ping Zhou, Bo Zhao
Description
As technology scales, device delay decreases accordingly while interconnects delay increases due to the growing wire resistance with its shrinking cross-sectional area. As a result, the performance of micro-processors has become interconnect dominant in deep submicron technologies. This problem can be mitigated using 3D stacking, which is an effective technology to reduce the length of global wires. A three-dimenional (3D) chip is a stack of several device layers that are connected through vertical wires. It is estimated that 3D stacking reduces wiring length by a factor of the square root of the number of layers used.
This project aims to investigate important design challenges in a 3D chip architecture. For example, when chip multiprocessors are built in a 3D space, what architecture should be used for best thermal dissipation and performance enhancement? What kind of interconnection network should be designed to take full advantage of 3D stacking? Can we stack more cache or memory layers to boost the chip performance in an energy efficient way? What are the implications of process variations in a 3D chip?
This is an active on-going research project. The team welcomes qualified and motivated graduate students to take part in this effort.
Publications
- Bo Zhao, Yu Du, Youtao Zhang, Jun Yang, "Variation-Tolerant Non-Uniform 3D Cache Management in Die Stacked Multicore Processor," to appear, The 42nd Annual IEEE/ACM International Symposium on Microarchitecture, 2009.
- Ping Zhou, Bo Zhao, Jun Yang, Youtao Zhang, "A Durable and Energy Efficient Main Memory Using Phase Change Memory Technology,” The 36th International Symposium on Computer Architecture, pp. 14-23, 2009.
- Yi Xu, Yu Du, Bo Zhao, Xiuyi Zhou, Youtao Zhang, Jun Yang,
"A Low-Radix and Low-Diameter 3D Interconnection
Network Design,"
The 15th International Symposium on High-Performance Computer
Architecture,
pp. 30-41, 2009.
Best Paper Award Nominee - Xiuyi Zhou, Yi Xu, Yu Du, Youtao Zhang, Jun Yang, "Thermal Management for 3D Processors via Task Scheduling," The 37th International Conference on Parallel Processing, pp. 115-122, 2008.